⚠ The three rules for the C3 SuperMini.
1. GPIO 2, 8, 9 are strapping pins (GPIO 9 = BOOT button). External pulls on these can change boot mode or block flashing.
2. GPIO 11–21 are the flash/PSRAM bus on modules — never wire them; the board won't boot or will corrupt.
3. 3.3V logic only. The C3 is not 5V-tolerant — level-shift 5V sensors before connecting.
1. GPIO 2, 8, 9 are strapping pins (GPIO 9 = BOOT button). External pulls on these can change boot mode or block flashing.
2. GPIO 11–21 are the flash/PSRAM bus on modules — never wire them; the board won't boot or will corrupt.
3. 3.3V logic only. The C3 is not 5V-tolerant — level-shift 5V sensors before connecting.
✅ Safe everyday pins: GPIO 0, 1, 3, 4, 5, 6, 7, 10.
ADC1 is on GPIO 0–4 (no ADC2 on the C3 = no WiFi conflict — analog reads just work).
Pin reference
Quick matrices
| Function | Pins |
|---|---|
| ADC1 (all WiFi-safe) | GPIO 0 (CH0), 1 (CH1), 2 (CH2), 3 (CH3), 4 (CH4) |
| Touch | None — the ESP32-C3 has no touch peripheral |
| PWM (LEDC) | Any GPIO 0–10 |
| I²C defaults (Wire) | SDA = GPIO 8, SCL = GPIO 9 (⚠ both strapping — remap to 0/1 or 6/7) |
| SPI (FSPI) | SCK = 4, MISO = 5, MOSI = 6, SS = 7 (flexible via pins matrix) |
| UART0 (USB serial) | TX = GPIO 21, RX = GPIO 20 (on-module USB bridge) — free GPIO UART: any pair via matrix |
| DAC | None — no DAC on the C3 (use PWM + RC filter for audio) |
| USB native | GPIO 18 (D−) / GPIO 19 (D+) — the on-board USB-C; don't rewire |
| Strapping | GPIO 2 (low at boot), GPIO 8 (high at boot), GPIO 9 (BOOT button) |
FAQ
Which pins are safe at boot?
GPIO 0, 1, 3, 4, 5, 6, 7, 10 are unconditionally safe. GPIO 2/8/9 work for outputs but keep their boot-time levels in mind; GPIO 11+ are off-limits.
Why does my C3 not flash with something wired?
Nine times out of ten it's GPIO 9 (BOOT) pulled by your circuit — disconnect it during flashing — or GPIO 2/8 strapped wrong.
Can I read analog while WiFi is on?
Yes — the C3's single ADC has no WiFi conflict (unlike the classic ESP32's ADC2). Use GPIO 0–4.
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